The 200G-per-lane electrical generation — what makes 1.6T possible at eight lanes instead of sixteen.
What 224G SerDes Is
224G SerDes doubles the electrical lane rate from the current 112G generation to 200 gigabits of payload per lane, carried at a line rate of 212.5 Gb/s once FEC overhead is counted. The 224 in the name is OIF's label for the class rather than a computed rate. The modulation does not change: it is still PAM4, two bits per symbol, so the symbol rate doubles to 106.25 gigabaud.
That single number is what 1.6T Ethernet rests on. It is also a harder doubling than the previous one, because the difficulties it creates are in the passive channel rather than in the transistors.
Why 53 GHz Changes Everything
The Nyquist frequency of a 106.25 gigabaud PAM4 signal is around 53 GHz. Printed circuit board dielectric loss, copper surface roughness, via stubs, connector reflections and package parasitics all get materially worse there, and unlike noise they cannot be equalised away without cost — every dB of loss the equaliser has to undo shows up as power and as amplified crosstalk.
The practical consequence is that the electrical channel a 224G lane can cross gets short. That is the real reason co-packaged optics, XPO and near-packaged optics became serious engineering programmes at exactly this generation rather than five years earlier. Shortening the channel is a more reliable fix than equalising a long one.
The Pressure It Puts on Module Design
Higher equalisation burden means more DSP work, and more DSP work means more module power — pushing directly against LPO, which wants to delete the module DSP entirely. The 1.6T generation is where those two pressures meet, and it is not yet settled which way each deployment will resolve.
Standards work is still in motion. The OIF is developing CEI-224G in four reach classes and IEEE P802.3dj covers 200 Gb/s per lane for Ethernet; treat any vendor claim of full compliance as a claim against a draft until the published document says otherwise.
Where You Meet It
Most concretely, in the choice of 1.6T module. OSFP-XD reaches 1.6T with sixteen lanes of 112G on existing silicon; OSFP with eight lanes of 224G reaches the same rate with half the optical channels but needs the newer SerDes at both ends. Both work; the second is the cleaner long-term answer if your platform can drive it. Our 1.6T lane guide compares them on fibre count and power.
It also decides breakout. At 224G, a 1.6T port splits into two 800G or four 400G with no lane-count gymnastics, which is a simpler fabric than the sixteen-lane alternative allows.
224G per lane in numbers
| Payload per lane | 200 Gb/s; line rate 212.5 Gb/s with KP4 overhead |
|---|---|
| Modulation | PAM4 — unchanged from the 112G generation |
| Symbol rate | 106.25 GBd (commonly rounded to about 112) |
| Nyquist frequency | about 53 GHz |
| Lanes for 1.6T | 8 |
| Lanes for 800G | 4 |
| OIF work | CEI-224G in four reach classes: XSR, VSR, MR to roughly 500 mm of PCB, LR to roughly 1 m of backplane |
| Where the name comes from | '224G' is OIF's project name for the class, not the exact signalling rate |
| IEEE work | P802.3dj, 200 Gb/s per lane electrical and optical |
| Dominant difficulty | channel loss, reflections and crosstalk above 50 GHz |
Related Terms
SerDes for the generation below it, OSFP-XD for the sixteen-lane alternative at 1.6T, and the 224G explainer for a longer treatment.